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A modeling study on the layout impact of with-in-die thickness range for STI CMP

Title	A modeling study on the layout impact of with-in-die thickness range for STI CMP
Author	Kıncal, S., Başım, Gül Bahar
Publication Date:	2013
Publication Place	- ECS
Subject	Chemical-mechanical planarization, Shallow-trench isolation, Optimization
Type	Document
Language	English
Digital	Yes
Manuscript	No
Library:	Özyeğin University
Library Asset ID	1938-5862
Record ID	209b0a82-7744-4cdd-9589-c4b6e5d713ba
Library Location	Mechanical Engineering
Date	2013
Notes	Due to copyright restrictions, the access to the full text of this article is only available via subscription.
Sample Text	Chemical Mechanical Planarization process has a proven track record as an effective method for planarizing the wafer surface at multiple points of the semiconductor manufacturing flow. One of the most challenging aspects of the CMP process, particularly in applications like Shallow Trench Isolation (STI), is the difference in relative removal rates of the different materials that are being polished. A certain amount of over-polish is required to clear oxide on top of the nitride, however, this over-polish may also lead to significant problems like dishing and erosion (introducing additional topography after the film has been planarized). This work formulates a methodology to predict how this additional topography is modulated by incoming layout properties introducing a parameter to accurately characterize line and space width on a layout with random geometric shapes.
DOI	10.1149/05039.0083ecst
Cilt	50

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A modeling study on the layout impact of with-in-die thickness range for STI CMP

Author Kıncal, S., Başım, Gül Bahar

Publication Date 2013

Publication Place - ECS

Subject Chemical-mechanical planarization, Shallow-trench isolation, Optimization

Type Document

Language English

Digital Yes

Manuscript No

Library Özyeğin University

Library Asset ID 1938-5862

Record ID 209b0a82-7744-4cdd-9589-c4b6e5d713ba

Library Location Mechanical Engineering

Date 2013

Notes Due to copyright restrictions, the access to the full text of this article is only available via subscription.

Sample Text Chemical Mechanical Planarization process has a proven track record as an effective method for planarizing the wafer surface at multiple points of the semiconductor manufacturing flow. One of the most challenging aspects of the CMP process, particularly in applications like Shallow Trench Isolation (STI), is the difference in relative removal rates of the different materials that are being polished. A certain amount of over-polish is required to clear oxide on top of the nitride, however, this over-polish may also lead to significant problems like dishing and erosion (introducing additional topography after the film has been planarized). This work formulates a methodology to predict how this additional topography is modulated by incoming layout properties introducing a parameter to accurately characterize line and space width on a layout with random geometric shapes.

DOI 10.1149/05039.0083ecst

Cilt 50