Tools and techniques for implementation of real-time video processing algorithms

Name: Tools and techniques for implementation of real-time video processing algorithms
Author: Levent, Vecdi Emre, Güzel, Aydın Emre, Tosun, M., Büyükmıhcı, Mert, Aydın, Furkan, Goren, S., Erbas, C., Akgun, T., Uğurdağ, Hasan Fatih

İsim	Tools and techniques for implementation of real-time video processing algorithms
Yazar	Levent, Vecdi Emre, Güzel, Aydın Emre, Tosun, M., Büyükmıhcı, Mert, Aydın, Furkan, Goren, S., Erbas, C., Akgun, T., Uğurdağ, Hasan Fatih
Basım Tarihi:	2019-01
Basım Yeri	- Springer Nature
Konu	Hardware IP generation, Real-time video processing, High-level synthesis, FPGA, Optical flow, Nested pipelining
Tür	Süreli Yayın
Dil	İngilizce
Dijital	Evet
Yazma	Hayır
Kütüphane:	Özyeğin Üniversitesi
Demirbaş Numarası	1939-8018
Kayıt Numarası	dfa6ce77-2487-4f78-b207-0f9c7a1c4c88
Lokasyon	Electrical & Electronics Engineering
Tarih	2019-01
Notlar	TÜBİTAK ; European Union's Artemis Joint Undertaking as part of project named ALMARVI
Örnek Metin	This paper describes flexible tools and techniques that can be used to efficiently design/generate quite a variety of hardware IP blocks for highly parameterized real-time video processing algorithms. The tools and techniques discussed in the paper include host software, FPGA interface IP (PCIe, USB 3.0, DRAM), high-level synthesis, RTL generation tools, synthesis automation as well as architectural concepts (e.g., nested pipelining), an architectural estimation tool, and verification methodology. The paper also discusses a specific use case to deploy the mentioned tools and techniques for hardware design of an optical flow algorithm. The paper shows that in a fairly short amount of time, we were able to implement 11 versions of the optical flow algorithm running on 3 different FPGAs (from 2 different vendors), while we generated and synthesized several thousand designs for architectural trade-off.
DOI	10.1007/s11265-018-1402-7
Cilt	91

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Tools and techniques for implementation of real-time video processing algorithms

Yazar Levent, Vecdi Emre, Güzel, Aydın Emre, Tosun, M., Büyükmıhcı, Mert, Aydın, Furkan, Goren, S., Erbas, C., Akgun, T., Uğurdağ, Hasan Fatih

Basım Tarihi 2019-01

Basım Yeri - Springer Nature

Konu Hardware IP generation, Real-time video processing, High-level synthesis, FPGA, Optical flow, Nested pipelining

Tür Süreli Yayın

Dil İngilizce

Dijital Evet

Yazma Hayır

Kütüphane Özyeğin Üniversitesi

Demirbaş Numarası 1939-8018

Kayıt Numarası dfa6ce77-2487-4f78-b207-0f9c7a1c4c88

Lokasyon Electrical & Electronics Engineering

Tarih 2019-01

Notlar TÜBİTAK ; European Union's Artemis Joint Undertaking as part of project named ALMARVI

Örnek Metin This paper describes flexible tools and techniques that can be used to efficiently design/generate quite a variety of hardware IP blocks for highly parameterized real-time video processing algorithms. The tools and techniques discussed in the paper include host software, FPGA interface IP (PCIe, USB 3.0, DRAM), high-level synthesis, RTL generation tools, synthesis automation as well as architectural concepts (e.g., nested pipelining), an architectural estimation tool, and verification methodology. The paper also discusses a specific use case to deploy the mentioned tools and techniques for hardware design of an optical flow algorithm. The paper shows that in a fairly short amount of time, we were able to implement 11 versions of the optical flow algorithm running on 3 different FPGAs (from 2 different vendors), while we generated and synthesized several thousand designs for architectural trade-off.

DOI 10.1007/s11265-018-1402-7

Cilt 91