HC-FFT: Highly configurable and efficient FFT implementation on FPGA

Name: HC-FFT: Highly configurable and efficient FFT implementation on FPGA
Author: Ergül, Pakize, Uğurdağ, Hasan Fatih, Davutoğlu, D.

İsim	HC-FFT: Highly configurable and efficient FFT implementation on FPGA
Yazar	Ergül, Pakize, Uğurdağ, Hasan Fatih, Davutoğlu, D.
Basım Tarihi:	2021
Basım Yeri	- TÜBİTAK
Konu	Fast fourier transform, Multipath delay commutator, Run-time configurable FFT
Tür	Süreli Yayın
Dil	İngilizce
Dijital	Evet
Yazma	Hayır
Kütüphane:	Özyeğin Üniversitesi
Demirbaş Numarası	1300-0632
Kayıt Numarası	796cae2a-f6e9-4fad-b911-1944c5122f3b
Lokasyon	Electrical & Electronics Engineering
Tarih	2021
Örnek Metin	FFT is one of the basic building blocks in many applications such as sensors, radars, communications. For some applications, e.g., real-time spectral monitoring and analysis, FFT needs to be”run-time configurable” so that the system is real-time. When examining the previous work on configurable real-time (FPGA-based) FFT implementations, we see that the degree of configurability is less than what is desired. In this paper, a new FFT architecture is proposed, which has a high degree of run-time configurability and yet does not compromise area or throughput. The configurable parameters of this design are the number of FFT points (up to 64K), forward versus inverse mode, output order (natural or bit-reversed), and the number of streams (up to 4). The proposed FFT architecture (HC-FFT) is designed using a parallel and pipelined radix-2 multipath delay commutator (MDC) FFT structure. HC-FFT was implemented on a Xilinx Kintex Ultrascale FPGA and was verified against the Xilinx FFT IP. Besides its high degree of run-time configurability, HC-FFT is quite efficient and offers a very high throughput of 87 Gbps with a quite reasonable area.
DOI	10.3906/ELK-2101-56
Cilt	29

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HC-FFT: Highly configurable and efficient FFT implementation on FPGA

Yazar Ergül, Pakize, Uğurdağ, Hasan Fatih, Davutoğlu, D.

Basım Tarihi 2021

Basım Yeri - TÜBİTAK

Konu Fast fourier transform, Multipath delay commutator, Run-time configurable FFT

Tür Süreli Yayın

Dil İngilizce

Dijital Evet

Yazma Hayır

Kütüphane Özyeğin Üniversitesi

Demirbaş Numarası 1300-0632

Kayıt Numarası 796cae2a-f6e9-4fad-b911-1944c5122f3b

Lokasyon Electrical & Electronics Engineering

Tarih 2021

Örnek Metin FFT is one of the basic building blocks in many applications such as sensors, radars, communications. For some applications, e.g., real-time spectral monitoring and analysis, FFT needs to be”run-time configurable” so that the system is real-time. When examining the previous work on configurable real-time (FPGA-based) FFT implementations, we see that the degree of configurability is less than what is desired. In this paper, a new FFT architecture is proposed, which has a high degree of run-time configurability and yet does not compromise area or throughput. The configurable parameters of this design are the number of FFT points (up to 64K), forward versus inverse mode, output order (natural or bit-reversed), and the number of streams (up to 4). The proposed FFT architecture (HC-FFT) is designed using a parallel and pipelined radix-2 multipath delay commutator (MDC) FFT structure. HC-FFT was implemented on a Xilinx Kintex Ultrascale FPGA and was verified against the Xilinx FFT IP. Besides its high degree of run-time configurability, HC-FFT is quite efficient and offers a very high throughput of 87 Gbps with a quite reasonable area.

DOI 10.3906/ELK-2101-56

Cilt 29