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Semi- and fully-random access LUTs for smooth functions

İsim Semi- and fully-random access LUTs for smooth functions
Yazar Gener, Y. S., Aydın, F., Gören, S., Uğurdağ, Hasan Fatih
Basım Tarihi: 2020
Basım Yeri - Springer
Tür Belge
Dil İngilizce
Dijital Evet
Yazma Hayır
Kütüphane: Özyeğin Üniversitesi
Demirbaş Numarası 978-303053272-7
Kayıt Numarası d4dbfe7a-ce10-4f22-ab6e-9282d4436bc6
Lokasyon Electrical & Electronics Engineering
Tarih 2020
Örnek Metin Look-Up Table (LUT) implementation of complicated functions often offers lower latency compared to algebraic implementations at the expense of significant area penalty. If the function is smooth, MultiPartite table method (MP) can circumvent the area problem by breaking up the implementation into multiple smaller LUTs. However, even some of these smaller LUTs may be big in high accuracy MP implementations. Lossless LUT compression can be applied to these LUTs to further improve area and even timing in some cases. The state-of-the-art in the literature decomposes the Table of Initial Values (TIV) of MP into a table of pivots and tables of differences from the pivots. Our technique instead places differences of consecutive elements in the difference tables and result in a smaller range of differences that fit in fewer bits. Constraining the difference of consecutive input values, hence semi-random access, allows us to further optimize designs. We also propose variants of our techniques with variable length coding. We implemented Verilog generators of MP for sine and exponential using conventional LUT as well as different versions of the state-of-the-art and our technique. We synthesized the generated designs on FPGA and found that our techniques produce up to 29% improvement in area, 11% improvement in timing, and 26% improvement in area-time product over the state-of-the-art.
Editör Metzler, C., Gaillardon, P.-E., Micheli, G. de, Silva-Cardenas, C., Reis, R.
DOI 10.1007/978-3-030-53273-4_13
Cilt 586
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Semi- and fully-random access LUTs for smooth functions

Yazar Gener, Y. S., Aydın, F., Gören, S., Uğurdağ, Hasan Fatih
Basım Tarihi 2020
Basım Yeri - Springer
Tür Belge
Dil İngilizce
Dijital Evet
Yazma Hayır
Kütüphane Özyeğin Üniversitesi
Demirbaş Numarası 978-303053272-7
Kayıt Numarası d4dbfe7a-ce10-4f22-ab6e-9282d4436bc6
Lokasyon Electrical & Electronics Engineering
Tarih 2020
Örnek Metin Look-Up Table (LUT) implementation of complicated functions often offers lower latency compared to algebraic implementations at the expense of significant area penalty. If the function is smooth, MultiPartite table method (MP) can circumvent the area problem by breaking up the implementation into multiple smaller LUTs. However, even some of these smaller LUTs may be big in high accuracy MP implementations. Lossless LUT compression can be applied to these LUTs to further improve area and even timing in some cases. The state-of-the-art in the literature decomposes the Table of Initial Values (TIV) of MP into a table of pivots and tables of differences from the pivots. Our technique instead places differences of consecutive elements in the difference tables and result in a smaller range of differences that fit in fewer bits. Constraining the difference of consecutive input values, hence semi-random access, allows us to further optimize designs. We also propose variants of our techniques with variable length coding. We implemented Verilog generators of MP for sine and exponential using conventional LUT as well as different versions of the state-of-the-art and our technique. We synthesized the generated designs on FPGA and found that our techniques produce up to 29% improvement in area, 11% improvement in timing, and 26% improvement in area-time product over the state-of-the-art.
Editör Metzler, C., Gaillardon, P.-E., Micheli, G. de, Silva-Cardenas, C., Reis, R.
DOI 10.1007/978-3-030-53273-4_13
Cilt 586
Özyeğin Üniversitesi
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