MIComp: 3D on-chip magneto-inductive computing with simultaneous wireless information and power transfer | Kütüphane.osmanlica.com

MIComp: 3D on-chip magneto-inductive computing with simultaneous wireless information and power transfer

İsim MIComp: 3D on-chip magneto-inductive computing with simultaneous wireless information and power transfer
Yazar Gülbahar, Burhan, Memişoğlu, G.
Basım Tarihi: 2018-05-08
Basım Yeri - Association for Computing Machinery, Inc
Konu Magneto-inductive computing, 3D on-chip communications, Simultaneous wireless information and power transfer
Tür Belge
Dil İngilizce
Dijital Evet
Yazma Hayır
Kütüphane: Özyeğin Üniversitesi
Demirbaş Numarası 978-145035761-6
Kayıt Numarası 1063300c-8dfc-47e1-9ce0-59f1f0279418
Lokasyon Electrical & Electronics Engineering
Tarih 2018-05-08
Örnek Metin On-chip computing platforms have bottlenecks including cost and physical limits of scaling transistors, communication bottleneck, energy efficiency and speed costs for memory. Three dimensional (3D) design, carbon nanotube materials, memristor based neuromorphic computing, and optical, RF and magneto-inductive (MI) wireless communication solutions are recently proposed. MI channels are non-radiative and non-interfering by forming coupled networks. They are future promising with capabilities of THz frequency, Tbit/s data rate, hundreds of zJ/bit and 109 W/mm2 communication and power transfer (PT) efficiencies, respectively. In addition, recently introduced network topology modulation (NTM) for MI channels provides network communication with low complexity, low latency and simultaneous wireless information and power transfer (SWIPT). In this article, unique advantages of THz MI channels, NTM design, nanoscale materials including graphene and single molecular magnets (SMMs), and 3D design are combined in a novel on-chip computing architecture denoted by MIComp by introducing fully efficient SWIPT for computing purposes. The system is theoretically modeled while the state space of the system obtained with nanoscale size coils and SMMs achieves 1010 to 1016 bits in each cycle and per mm3 volume of chip compared with the current transistor counts of on the orders of 109 per mm2. Furthermore, each MIComp cycle has ability to perform for multiple purposes consisting of computing operations, memory state implementations and on-chip communications. It promises a novel solution for communication, energy and space bottlenecks for on-chip computing design.
DOI 10.1145/3203217.3203281
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MIComp: 3D on-chip magneto-inductive computing with simultaneous wireless information and power transfer

Yazar Gülbahar, Burhan, Memişoğlu, G.
Basım Tarihi 2018-05-08
Basım Yeri - Association for Computing Machinery, Inc
Konu Magneto-inductive computing, 3D on-chip communications, Simultaneous wireless information and power transfer
Tür Belge
Dil İngilizce
Dijital Evet
Yazma Hayır
Kütüphane Özyeğin Üniversitesi
Demirbaş Numarası 978-145035761-6
Kayıt Numarası 1063300c-8dfc-47e1-9ce0-59f1f0279418
Lokasyon Electrical & Electronics Engineering
Tarih 2018-05-08
Örnek Metin On-chip computing platforms have bottlenecks including cost and physical limits of scaling transistors, communication bottleneck, energy efficiency and speed costs for memory. Three dimensional (3D) design, carbon nanotube materials, memristor based neuromorphic computing, and optical, RF and magneto-inductive (MI) wireless communication solutions are recently proposed. MI channels are non-radiative and non-interfering by forming coupled networks. They are future promising with capabilities of THz frequency, Tbit/s data rate, hundreds of zJ/bit and 109 W/mm2 communication and power transfer (PT) efficiencies, respectively. In addition, recently introduced network topology modulation (NTM) for MI channels provides network communication with low complexity, low latency and simultaneous wireless information and power transfer (SWIPT). In this article, unique advantages of THz MI channels, NTM design, nanoscale materials including graphene and single molecular magnets (SMMs), and 3D design are combined in a novel on-chip computing architecture denoted by MIComp by introducing fully efficient SWIPT for computing purposes. The system is theoretically modeled while the state space of the system obtained with nanoscale size coils and SMMs achieves 1010 to 1016 bits in each cycle and per mm3 volume of chip compared with the current transistor counts of on the orders of 109 per mm2. Furthermore, each MIComp cycle has ability to perform for multiple purposes consisting of computing operations, memory state implementations and on-chip communications. It promises a novel solution for communication, energy and space bottlenecks for on-chip computing design.
DOI 10.1145/3203217.3203281
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